Electronics & Communication
pp. 108–117
Vol. 1, Issue 1
DOI
The Compltete VLSI Design Flow: From RTL Design to Semiconductor Fabrication
Very Large-Scale Integration (VLSI) design is a fundamental technology for developing modern integrated circuits that power consumer electronics, communication systems, automotive applications, and artificial intelligence hardware. This paper presents a comprehensive overview of the complete VLSI design flow, from Register Transfer Level (RTL) design and functional verification to logic synthesis, static timing analysis, physical design, power optimization, and semiconductor fabrication. It discusses the significance of verification, timing closure, and layout validation techniques such as Design Rule Checking (DRC) and Layout Versus Schematic (LVS) in ensuring reliable chip performance. The paper also highlights the role of Electronic Design Automation (EDA) tools and optimization strategies in designing high-performance, low-power, and manufacturable integrated circuits. This overview serves as a valuable reference for understanding the end-to-end VLSI design process and its importance in modern semiconductor engineering.
VLSI Design Flow
Register Transfer Level (RTL)
Logic Synthesis
Static Timing Analysis (STA)
Physical Design
Jayasoorya J SHETTY
28 Jul 2026
50 views
VDW-2026-377547E
Electronics & Communication
pp. 68–77
Vol. 1, Issue 1
DOI
Modelling and Simulation of MOSFET Transistor Characteristics Using SPICE
Abstract— The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is the cornerstone of modern CMOS and VLSI technology. Accurate modelling of its characteristics is essential for circuit design and performance optimization. This paper explores MOSFET transistor modelling based on the NPTEL course “The MOS Transistor Modeling” by Prof. Navjeet Bagga. The study covers the physical structure, MOS capacitor behaviour, threshold voltage derivation, and operating regions of the MOSFET. The classical Level-1 model equations for drain current in linear and saturation regions are derived and validated through extensive LTspice simulations. Simulated output (I_D vs V_DS) and transfer (I_D vs V_GS) characteristics show excellent agreement with theoretical predictions, with errors typically below 3%. Parametric analysis of W/L ratio further confirms the linear scaling of drain current. The work highlights both the strengths and limitations of the basic Level-1 model, particularly for long-channel devices. This study successfully bridges theoretical learning from NPTEL with practical simulation skills, serving as a valuable educational resource for students in microelectronics and VLSI design.
Keywords— MOSFET Modelling
MOS Transistor Modeling
Level-1 Model
Threshold Voltage
I-V Characteristics
Ramadas Vijendra
07 Jul 2026
96 views
VDW-2026-7ADDA47
Electronics & Communication
pp. 62–67
Vol. 1, Issue 1
DOI
Deep Learning-Based Spectrum Sensing for Cognitive Radio in Rural Connectivity
The increasing demand for wireless communication services has resulted in spectrum scarcity despite the existence of numerous underutilized licensed frequency bands. This issue is particularly significant in rural areas where communication infrastructure is limited and broadband penetration remains low. Cognitive Radio (CR) technology has emerged as a promising solution for improving spectrum utilization through dynamic spectrum access. Spectrum sensing is the fundamental function of cognitive radio systems, enabling secondary users to identify unused spectrum without causing interference to licensed users. Traditional spectrum sensing techniques such as energy detection, matched filtering, and cyclostationary feature detection suffer from reduced accuracy under low signal-to-noise ratio conditions and dynamic wireless environments. Recent advancements in deep learning have demonstrated remarkable improvements in signal classification and spectrum occupancy detection. This paper presents a comprehensive study of deep learning-based spectrum sensing techniques for cognitive radio networks aimed at enhancing rural connectivity. Various deep learning architectures, including Convolutional Neural Networks, Long Short-Term Memory networks, Autoencoders, and hybrid CNN-LSTM models, are discussed. A deep learning-enabled spectrum sensing framework is proposed to improve detection accuracy, spectrum utilization, and communication reliability in rural environments. The benefits, challenges, performance evaluation metrics, and future research directions are also examined.
Cognitive Radio
Deep Learning
Spectrum Sensing
Rural Connectivity
Dynamic Spectrum Access
Arka saha
18 Jun 2026
68 views
VDW-2026-8B46DCC
Electronics & Communication
pp. 57–61
Vol. 1, Issue 1
DOI
Optimized MIMO-OFDM Channel Estimation Using Convolutional Neural Networks
Multiple Input Multiple Output-Orthogonal Frequency Division Multiplexing (MIMO-OFDM) has become a fundamental transmission technique for modern wireless communication systems due to its high spectral efficiency and robustness against multipath fading. Accurate channel estimation is essential for reliable data transmission in MIMO-OFDM systems. Traditional estimation methods such as Least Squares (LS) and Minimum Mean Square Error (MMSE) suffer from performance degradation under low Signal-to-Noise Ratio (SNR) conditions and rapidly varying channels. Recent advancements in deep learning have demonstrated promising capabilities in wireless signal processing tasks. This paper proposes an optimized Convolutional Neural Network (CNN)-based channel estimation framework for MIMO-OFDM systems. The proposed model learns channel characteristics directly from received pilot signals and estimates channel coefficients with improved accuracy. Simulation results demonstrate that the CNN-based estimator significantly outperforms conventional LS and MMSE estimators in terms of Mean Square Error (MSE) and Bit Error Rate (BER). The proposed approach provides enhanced robustness in dynamic wireless environments and is suitable for future 5G and 6G communication systems.
MIMO-OFDM
Channel Estimation
Deep Learning
Convolutional Neural Networks
Wireless Communications
Snehasish Biswas
+1 co-author
18 Jun 2026
138 views
VDW-2026-A2CFA4A
Electronics & Communication
pp. 45–56
Vol. 1, Issue 1
DOI
SDN-based traffic management for vehicular ad-hoc networks (VANETs)
Vehicular Ad-hoc Networks (VANETs) play a critical role in enabling intelligent transportation systems by facilitating real-time communication among vehicles and roadside infrastructure. However, the highly dynamic topology, frequent link failures, and traffic congestion present significant challenges to efficient network management. Software-Defined Networking (SDN) offers a promising solution by introducing centralized control, global network visibility, and dynamic traffic management capabilities. This paper proposes an SDN-based traffic management framework for VANETs that leverages a centralized SDN controller to monitor network conditions, optimize routing decisions, and reduce communication overhead. The proposed architecture enhances packet delivery performance, minimizes end-to-end delay, and improves overall network throughput through adaptive traffic control mechanisms. Simulation-based analysis demonstrates the effectiveness of the proposed approach in managing vehicular traffic under varying network densities. The results indicate that SDN-enabled VANETs can significantly improve network efficiency, scalability, and reliability compared to conventional VANET architectures.
VANET
Software-Defined Networking
SDN
Traffic Management
Intelligent Transportation Systems
Omar Faruk molla
18 Jun 2026
68 views
VDW-2026-49C0B58
Electronics & Communication
pp. 40–44
Vol. 1, Issue 1
DOI
Natural Language Interface for Controlling Embedded Home Automation Systems
The rapid advancement of the Internet of Things (IoT), Artificial Intelligence (AI), and Embedded Systems has transformed conventional homes into intelligent living environments. Home automation systems enable users to control household appliances, lighting, security devices, and environmental controls remotely. However, traditional control methods often require technical knowledge and complex interfaces. Natural Language Interfaces (NLIs) provide a human-friendly solution by allowing users to interact with embedded home automation systems using spoken or written commands in natural language.
This research presents a Natural Language Interface integrated with an embedded home automation system that enables users to control smart devices through voice commands. The proposed system utilizes Natural Language Processing (NLP), speech recognition, and microcontroller-based embedded hardware to interpret user intentions and execute corresponding actions. The architecture includes speech acquisition, language understanding, command processing, and device control modules. Experimental analysis demonstrates high command recognition accuracy, reduced response time, and improved user experience compared to traditional interfaces. The study highlights the potential of natural language-based control systems in enhancing accessibility, convenience, and usability for smart home environments.
Natural Language Interface
Embedded Systems
Home Automation
Internet of Things
Natural Language Processing
Suchana Mondal
18 Jun 2026
40 views
VDW-2026-318F3C6
Electronics & Communication
pp. 29–33
Vol. 1, Issue 1
DOI
Smart Antenna Array Design with Reinforcement Learning-Based Beam Steering
Smart antenna arrays have emerged as a cornerstone technology for fifth-generation (5G) and beyond wireless communication systems, enabling adaptive beamforming, spatial multiplexing, and interference suppression. Conventional beam steering methods relying on exhaustive codebook search or model-based optimization suffer from high computational overhead and limited adaptability to dynamic channel conditions. This paper presents a comprehensive survey and a novel framework integrating Reinforcement Learning (RL)—specifically Deep Q-Networks (DQN) and Proximal Policy Optimization (PPO)—with phased antenna array architectures for intelligent, real-time beam steering. The proposed approach models the beam selection problem as a Markov Decision Process (MDP) and trains an RL agent to maximize long-term spectral efficiency while minimizing beam misalignment and tracking latency. Simulation results demonstrate that the RL-based approach achieves up to 97.3% beam accuracy and 23% throughput gain over conventional codebook-based methods in highly mobile multipath environments.
Smart Antenna
Phased Array
Reinforcement Learning
Beam Steering
5G/6G
Krish Karmakar
+2 co-authors
16 Jun 2026
109 views
VDW-2026-6633F00
Electronics & Communication
pp. 22–28
Vol. 1, Issue 1
DOI
Hardware-Software Co-Design for Low-Latency Object Detection in Autonomous Drones
Autonomous aerial vehicles increasingly rely on real-time visual perception for navigation, obstacle avoidance, surveillance, and inspection tasks. Object detection is the cornerstone of this perception pipeline, yet the strict size, weight, and power (SWaP) constraints of drones, combined with the sub-30-millisecond latency budgets demanded by high-speed flight, make conventional software-only deployment of deep convolutional detectors impractical. This paper presents a hardware-software co-design framework for low-latency object detection on autonomous drones. We review the evolution of lightweight detection architectures and edge accelerator platforms, propose a heterogeneous system-on-chip (SoC) architecture that combines a neural processing unit (NPU), a field-programmable gate array (FPGA) pre/post-processing pipeline, and general-purpose cores, and describe a closed-loop co-optimization methodology spanning network architecture search, quantization, pruning, dataflow scheduling, and memory hierarchy configuration. We evaluate the proposed framework on a representative aerial object detection benchmark using five hardware targets, demonstrating that the co-designed configuration achieves an end-to-end latency of 6.8 ms per frame (147 frames per second), a 14x speed-up over an embedded ARM CPU baseline, while retaining 97% of the mean average precision (mAP) of the floating-point reference model and reducing energy per inference by more than 20x relative to a discrete mobile GPU. The results confirm that jointly optimizing model structure and accelerator architecture, rather than treating either in isolation, is essential to meeting the latency, accuracy, and energy requirements of real-time drone perception.
Autonomous Drones
Object Detection
Hardware-Software Co-Design
FPGA-SoC
Edge AI
Purba Saha
+3 co-authors
16 Jun 2026
93 views
VDW-2026-1806402
Electronics & Communication
pp. 16–21
Vol. 1, Issue 1
DOI
Smart Waste Sorter-Automatic Waste Segregation System.
Today, the rapid increase in the population and the urban development has led to an increase in the level of solid wastes in India. Managing this waste efficiently has now become a major challenge for the modern societies. One of the main problem in waste management is the lack of segregation at the source. This leads to environmental pollution, health risks and inefficient recycling process. To overcome such issues, this project presents an Automated Waste classification and monitoring system powered by IoT. It automatically separates waste into 3 categories that is wet, dry and metallic waste. The system uses ESP32 microcontroller with sensors such as IR sensor, Raindrop sensor, Proximity sensor. A stepper motor is used to move the position of the bins, while a servo motor is used to control the waste inlet flap. This automated system reduces the manual effort required for segregation and improves waste management efficiency, making it suitable for homes, campuses as well in public areas.
IoT
Waste Segregation
ESP32
Servo motor
Stepper motor
Rupali Raju Bhumkar
+4 co-authors
15 Jun 2026
265 views
VDW-2026-7B1E696
Electronics & Communication
pp. 9–15
Vol. 1, Issue 1
DOI
Hybrid Machine Learning Models for Fault Detection in 5G Base Station Hardware
The rapid deployment of fifth-generation (5G) wireless communication networks has introduced complex base station architectures consisting of advanced radio units, massive MIMO antennas, power amplifiers, remote radio heads, and edge computing modules. These components operate under demanding conditions, making fault detection a critical requirement for maintaining network reliability and quality of service (QoS). Traditional fault detection methods rely on threshold-based monitoring and manual inspection, which are often inadequate for identifying complex hardware failures in real time. This paper presents a comprehensive study of hybrid machine learning (ML) models for fault detection in 5G base station hardware. The proposed approach combines supervised and unsupervised learning techniques to enhance detection accuracy while minimizing false alarms. Experimental analysis demonstrates that hybrid models outperform conventional machine learning algorithms in detecting hardware anomalies such as amplifier degradation, antenna faults, overheating, and power supply failures. The study highlights the potential of artificial intelligence-driven predictive maintenance in next-generation telecommunications infrastructure.
5G Networks
Fault Detection
Hybrid Machine Learning
Predictive Maintenance
Long Short-Term Memory (LSTM)
Rajonyaa Majumder
+1 co-author
15 Jun 2026
62 views
VDW-2026-103F732
Electronics & Communication
pp. 4–8
Vol. 1, Issue 1
DOI
AI-Driven Fault Detection and Power Optimization in VLSI Circuits Using Machine Learning Techniques
The proposed FPGA-based architecture was conceptually evaluated against conventional CPU and GPU platforms across three key metrics: power consumption, inference throughput, and energy efficiency.
FPGAs demonstrate significantly lower power consumption compared to GPUs while maintaining competitive inference throughput suitable for real-time edge applications. The architecture achieves superior performance-per-watt, making it highly suitable for resource-constrained embedded environments such as IoT devices, autonomous systems, and smart healthcare applications.
Dynamic voltage-frequency scaling further reduces power consumption during low-workload periods, while quantization and pruning techniques maintain model accuracy within acceptable bounds for edge deployment.
FPGA
Edge Computing
Deep Learning Inference
Energy Efficiency
Neural Network Acceleration
Sushovan Chandra
+2 co-authors
15 Jun 2026
117 views
VDW-2026-355B83C