Modelling and Simulation of MOSFET Transistor Characteristics Using SPICE

Abstract— The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is the cornerstone of modern CMOS and VLSI technology. Accurate modelling of its characteristics is essential for circuit design and performance optimization. This paper explores MOSFET transistor modelling based on the NPTEL course “The MOS Transistor Modeling” by Prof. Navjeet Bagga. The study covers the physical structure, MOS capacitor behaviour, threshold voltage derivation, and operating regions of the MOSFET. The classical Level-1 model equations for drain current in linear and saturation regions are derived and validated through extensive LTspice simulations. Simulated output (I_D vs V_DS) and transfer (I_D vs V_GS) characteristics show excellent agreement with theoretical predictions, with errors typically below 3%. Parametric analysis of W/L ratio further confirms the linear scaling of drain current. The work highlights both the strengths and limitations of the basic Level-1 model, particularly for long-channel devices. This study successfully bridges theoretical learning from NPTEL with practical simulation skills, serving as a valuable educational resource for students in microelectronics and VLSI design.

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